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Espressif Systems /ESP32-P4 /UHCI0 /STATE0

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Interpret as STATE0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RX_ERR_CAUSE 0DECODE_STATE

Description

UHCI Receive Status Register

Fields

RX_ERR_CAUSE

Indicates the error types when DMA receives the error frame. 3’b001: UHCI packet checksum error. 3’b010: UHCI packet sequence number error. 3’b011: UHCI packet CRC bit error. 3’b100: find 0xC0, but received packet is uncompleted. 3’b101: 0xC0 is not found, but received packet is completed. 3’b110: CRC check error.
DECODE_STATE

Indicates UHCI decoder status.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data